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| Ordering number: EN 5708 ThybridICk Film Hybrid IC STK673-010 3-Phase Stepping Motor Driver (sine wave drive) Output Current 2.4A Overview STK673-010 is a 3-phase stepping motor driver hybrid IC with built-in microstep controller having a bipolar constant current PWM system, in which a power MOSFET is employed at an output stage. It includes a 3-phase distributed controller for a 3-phase stepping motor to realize a simple configuration of the motor driver circuit. The number of motor revolution can be controlled by the frequency of external clock input. 2, 2-3, W2-3 and 2W23-phase excitation modes are available. The basic step angle of the stepping motor can be separated as much as one-eighth 2-3-phase to 2W2-3-phase excitation mode control quasi-sine wave current, thereby realizing low vibration and low noise. Applications * As a 3-phase stepping motor driver for transmission and reception in a facsimile. * As a 3-phase stepping motor driver for feeding paper feed or for an optical system in a copying machine. * Industrial machines or products employing 3-phase stepping motor driving. * An MOI output terminal which outputs 1 pulse per 1 cycle of phase current. * A CW/CCW terminal which switches the rotational direction. * A Hold terminal which temporarily holds the motor in a state where the phase current is conducted. * An Enable terminal which can forcibly turns OFF a MOSFET of a 6 output driving element in normal operation * Schmitt inputs with built-in pull-up resistor (20 k typ) * Motor current can be set by changing the voltage of the Vref terminal (0.63V per 1A, dealing as much as 0 to 1/2VCC2 (4A)). * The clock input for controlling the number of motor revolution lies in a range of 0 to 50kHz. * Supply voltage: VCC1 = 16 to 30V, VCC2 = 5.0V5% * A built-in current detection resistor (0.227) * A motor current during revolution can deal with as high as 2.4A at Tc = 105C and as high as 4A at Tc = 50C or lower. Package Dimensions unit: mm 4130 [STK673-010] Features * Number of motor revolution can be controlled by the frequency of external clock input. * 4 types of modes, i.e., 2, 2-3, W2-3 and 2W2-3-phase excitations, are available which can be selected based on rising of clock signals, by switching Highs and Lows of Mode A and Mode B terminals. * Setting a Mode C terminal Low allows an excitation mode that is based on rising and falling of a clock signal. By setting the Mode C terminal Low, phases that are set only by Mode A and Mode B can be changed to other phases as follows without changing the number of motor revolution: 2-phase may be switched to 2-3phase; 2-3-phase may be switched to W2-3-phase; and W2-3-phase may be switched to 2W2-3-phase. * Phase is maintained even when the excitation mode is changed SANYO Electric Co., Ltd. Semiconductor Business Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN N2997HA (ID) No. 5708--1/16 STK673-010 Specifications Maximum Ratings at Tc = 25C Parameter Maximum supply voltage 1 Maximum supply voltage 2 Input voltage Phase output current Operating substrate temperature Junction temperature Storage temperature Symbol VCC1 max VCC2 max VIN max IO max Tc max Tj max Tstg VCC2 = 0V No signal Logic input block VCC2=5V, Clock100Hz Conditions Ratings 36 -0.3 to +7.0 -0.3 to +7.0 4.0 105 150 -40 to +125 Unit V V V A C C C Allowable Operating Ranges at Ta = 25C Parameter Operating supply voltage 1 Operating supply voltage 2 Input voltage Phase output current 1 Phase output current 2 Clock frequency Symbol VCC1 VCC2 VIH I O1 I O2 Clock Without heat sink Tc = 105C pin 11 input frequency With signal With signal Conditions Ratings 16 to 30 5.0V 5% 0 to VCC2 1.7 2.4 0 to 50 Unit V V V A A kHz Electrical Characteristics at Tc = 25C, VCC1 = 24V, VCC2 = 5V Parameter VCC2 supply current Effective output current FET diode forward voltage Output saturation voltage Output leakage current Input high voltage Input low voltage Input current Vref input voltage Vref input current MOI output high voltage MOI output low voltage PWM frequency Note: Constant voltage supply is used. Symbol ICCO Io ave Vdf Vsat IOL VIH VIL IIL VrH Ir VOH VOL Fc Enable=Low each phase R/L=2/6mH 2W 2-3-phase excitation Vref = 0.61V If = 1A (RL =23) RL =23 RL =23 9 terminals, Pins 11 to 18, 22 9 terminals, Pins 11 to 18, 22 Pins 11 to 18 pin = GND level pullup resistance 20k (typ.) Pin 10 Pin 10, pin 10 = 2.5V Internal resistance 40 k (typ.) Pin 20, pin 20 to 19 = 820 Pin 20, pin 21 to 20 = 1.6 k Conditions min - 0.62 - - - 4.0 - 115 0 440 2.5 - - typ 6.1 0.69 1.0 0.45 - - - 250 - 625 - - 63 max 12 0.76 1.6 0.56 0.1 - 1.0 550 VCC2/2 810 - 0.4 - Unit mA Arms V V mA V V A V A V V kHz No. 5708--2/16 STK673-010 Electrical Characteristics 2 at Tc = 25C, VCC1 = 24V, VCC2 = 5V Current division ratio at phase current of 1/4 electrorotation, in each excitation mode (unit = %, typ.) Number of current division is put in parentheses Current division 1/96 0 2/96 0 3/96 4/96 0 5/96 6/96 38 7/96 8/96 50 9/96 10/96 61 11/96 12/96 71 13/96 14/96 79 15/96 16/96 100 17/96 18/96 92 19/96 20/96 96 21/96 22/96 100 23/96 100 24/96 Note: 100 98 96 87 87 87 71 50 50 26 26 13 2 phase (1) 2-3 phase (3) W2-3 phase (6) 2W2-3 phase (12) 0 Constant voltage supply is used as power supply. Electrical Characteristic 2 represents design values. Measurement for controlling the standard value is not conducted. No. 5708--3/16 STK673-010 Equivalent Block Diagram No. 5708--4/16 STK673-010 Sample Application Circuit Set Equation of Output Current IO Peak Value Io peak = Vref / K where Vref 0.5 x VCC2 Vref = VCC2 x Rox / (R01 + Rox) Rox = (R02 x 4.0 k) / (R02 + 4.0k) * R02 is preferably set to be 100 in order to minimize the effect of the internal impedance (4.0k 30%) of STK637-010 * For noise reduction in 5V system, put the GND side of bypass capacitor (220 F) of VCC1 (shown in a thick line in the above Sample Application Circuit) in the vicinity of pins 27 and 28 of the hybrid IC. * Set the capacitance value of the bypass capacitor C1 such that a ripple current of a capacitance, which varies in accordance with the increase of motor current, lies in an allowable range. * K in the above-mentioned set equation varies within 5 to 10% depending on the inductance L and resistance value R of the used motor. Check the peak value setting of Io upon actual setting. K = 0.63 (V/A) No. 5708--5/16 STK673-010 Input/Output Terminals Functions of 5V System Terminal name Clock No. 11 Function Basic clock for switching phase current of motor Input frequency range: DC to 50kHz Minimum pulse width: 10 High level duty: 40 to 60% Mode A Mode B Mode C TU 12 13 18 22 Sets excitation mode Sets excitation mode Sets excitation mode Sets excitation mode Switches 2-3 phase excitation of step current to rectangular current More effective in increasing torque than in lowering vibration of motor Hold CW/CCW Enable Reset MOI 14 15 16 17 20 Temporarily holds the motor in a state Switches the rotational direction of the motor Turns OFF all of the driving MOSFET System reset Make sure to input a reset signal of 10 or more 0 1 = CW, 0 = CCW 0 0 Outputs 1 pulse of a high level signal per one cycle of phase current Vref 10 Sets the peak value of the motor current set at 0.63V per 1A Maximum value 0.5xVCC2 (4A max) See table listed below See table listed below See table listed below See table listed below Conditions upon Functioning 0 = Low, 1 = High Rising edge in Mode C = 1 Rising and falling edge in Mode C = 0 Monitors the number of revolution of the motor Excitation Mode Table Input condition Excitation No. Mode A 0 0 0 1 1 0 0 0 1 Mode B 0 1 1 0 1 0 0 1 0 Mode C 1 1 1 1 1 0 0 0 0 TU 1 1 0 1 1 1 0 1 1 (1) (2) (3) (4) (5) (6) (7) (8) (9) 2-phase 2-3-phase 2-3-phase TU W2-3-phase 2W2-3-phase 2-3-phase 2-3-phase TU W2-3-phase 2W2-3-phase 1 3 1 6 12 3 1 6 12 Excitation Mode Number of current steps Number of clock pulse per one cycle of phase current 6 12 12 24 48 6 6 12 24 As shown in the table, TU terminal is only effective for Excitation Nos. (3) and (7). Although the present hybrid IC is not damaged even when TU = 0 is mistakenly input in Excitation, other than Excitation Nos. (3) and (7), motor vibration or motor current may increase. * Timing charts for 3-phase stepping motor driver is illustrated on pages 10 to 14 for exemplary operations of Enable Hold, CW/CCW for Excitation Nos. (1), (2), (3), (4), (5) and (9), and Excitation No. (4). No. 5708--6/16 STK673-010 Notes On Use (1) Input terminal use of 5V system [RESET and Clock (timing of input signal upon rising of power supply)] The driver is configured to include a 5V system logic section and a 24V MOSFETs section. The MOSFETs on both VCC1 side and GND side are N-channels. Thus, the MOSFETs on the VCC1 side is provided with a charging pump circuit for generating a voltage higher than that of VCC1. When a Low signal is input to a RESET terminal for operating the RESET, the charging pump is stopped. After the release of the RESET (High input), it requires a period of 1.7 ms to rise the charging pump. Accordingly, even when a Clock signal is input during the rising of the charging pump circuit, the MOSFET cannot be operated. Such a timing needs to be taken into consideration for inputting a Clock signal. An example of timing is shown in Figure 1. Figure 1. Timing chart of RESET signal and Clock signal When the RESET terminal switches from Low to High where a High period is 1.7ms or longer and the Clock input is conducted in a Low state, each phase current of the motor is maintained at the following values. Phase U phase V phase W phase Current in the case where the initial Clock signal is maintained at Low level (Other than 2-3-phase TU excitation) 0 -87% of peak current during normal rotation +87% of peak current during normal rotation Current in the case where the initial Clock signal is maintained at Low level (2-3-phase TU excitation) 0 -100% of peak current during normal rotation +100% of peak current during normal rotation Refer to the Timing charts for operations. [Clock] Clock signals should be input under the following conditions so that all 9 types of excitation modes shown in the Excitation Mode Table. Input frequency range Minimum pulse width High level duty DC to 50 kHz 10 s 40 to 60 % [Mode A, Mode B, Mode C and TU] These 4 terminals allow selection of excitation modes. For specific operations, refer to Excitation Mode Table and Timing Charts. [Hold, CW/CCW] Hold temporary holds the motor while a phase current of the motor is conducted, even when there are clock inputs of Low input. High input releases the hold, and the motor current changes again synchronizing with the rising of Clock signals. Refer to Timing Chart for exemplary operations. CW/CCW switches the rotational direction of the motor. Switching to High gives a rotational operation of CW, and Low gives a rotation operation of CCW. The timing of switching the rotation is synchronizes the rising of the When Mode C is not used, it is an operation based on rising of the Clock and thus the above-mentioned condition of high level duty is negligible. A minimum pulse width of 10 s or more allows excitation operation by Mode A and Mode B. Since the operation is based on rising and falling of the Clock under the use of Mode C, it is most preferable to set the high level duty to 50 % so as to obtain uniform step-wise current widths. No. 5708--7/16 STK673-010 clock signals. Refer to Timing Chart for exemplary operations. [Enable] High input renders a normal operation and Low input forcibly renders a gate signal of MOSFETs Low, thereby cut- ting a motor current. Once again High input renders a current to conduct in the motor. The timing of the current does not synchronize with the clock. Since Low input of Enable forcibly cuts the motor current, it can be used to cut a V-phase or W-phase while Clock is maintained in a Low level state after the RESET operation. Figure 2. Input timings of RESET signal, Enable signal and Clock signal [Vref (Setting motor current peak value)] A peak value of a motor current Io is determined by R01, R02, VCC2 (5V) and the following set equation (I). Set equation of peak value of motor current Io Io peak = Vref / K......(I) where Vref 0.5 x VCC2 K = 0.63 (V/A) Vref = VCC2 x Rox /(R01 + Rox) Rox = (R02 x 4.0 k) / (R02 + 4.0 k) * R02 is preferably set to be 100 in order to minimize the effect of the internal impedance (4.0k 30%) of STK637-010 * K in the above-mentioned set equation varies within 5 to 10% depending on the inductance L and resistance value R of the used motor. Check the peak value setting of Io upon actual setting. * Refer to Figure 4 for an example of Vref-Io characteristics (2) Allowable Operating Ranges of Motor Current Set the peak value of the motor current Io so as to lie within a region below the curve shown in Figure 5 on page 14. When the operation substrate temperature Tc is set to 105C, Io max should be 2.4 A or lower and a Hold operation should be conducted where Io max is 2.0 A or lower. For operation where Tc = 50C, Io max should be 4.0 A or lower and a Hold operation should be conducted where Io max is 3.3 A or lower. (3) Heat Radiation Design Heat radiation design for reducing the operation substrate temperature of the hybrid IC is effective in enhancing the quality of the hybrid IC. The size of a heat sink varies depending on the average power loss Pd in the hybrid IC. As shown in Figure 6 on page 14, Pd increases in accordance with the increase of the output current. Since the starting current and the stationary current coexist in an actual motor operation, Pd cannot be obtained only from the data shown in Figure 6. Therefore, Pd is obtained assuming that the timing of the actual motor operation is a repeated operation shown in the following Figure 3. No. 5708--8/16 STK673-010 Figure 3. Timing Chart of Motor Operation The average power loss Pd in the hybrid IC upon an operation shown in Figure 3 can be obtained by the following equation (II): Pd = (T1xP1 + T1xP2 + T3xP3 + T4xP4)/T0 ...(II) When the value obtained by the above equation (II) is equal to or less than 3.4W and the ambient temperature Ta is equal to or lower than 60C, there is no need of providing a heat sink. Refer to Figure 7 for data of the operation substrate temperature when no heat sink is used. The size of the heat sink can be decided depending on c-a obtained by the following equation (III) and from Figure 8. c-a = (Tc max - Ta)/Pd ..... (III) where Tc max: Maximum operation substrate temperature = 105C Ta: Ambient temperature of hybrid IC Although heat radiation design can be realized by following the above equations (II) and (III), make sure to check that the substrate temperature Tc is equal to or lower than 105C after mounting the hybrid IC into a set. No. 5708--9/16 STK673-010 Timing Chart of 3-phase stepping motor driver 2 phase excitation 2-3 phase excitation No. 5708--10/16 STK673-010 2-3 phase excitation TU W2-3 phase excitation No. 5708--11/16 STK673-010 2W2-3 phase excitation w2-3 phase excitation (Enable operation) No. 5708--12/16 STK673-010 W2-3 phase excitation (Hold operation) W2-3 phase excitaion (CW/CCW operation) No. 5708--13/16 STK673-010 W2-3 phase excitation to 2W2-3 phase excitation (ModeC operation) Figure 4. Vref - Io Figure 5. Io - Tc Motor current setting voltage, Vref - V Motor current, Io - A Motor current Io (peak value of stepping current) - A Operating substrate temperature, Tc - C No. 5708--14/16 STK673-010 Tc - Pc Figure 6. Hybrid IC's internal average power loss, Pd - W Pd - Io Figure 7. Substrate temperature rise, Tc - C Motor current, Io - A Hybrid IC's internal average power loss, Pc - W Figure 8. Heat sink thermal resistance, ca -C/W ca - S Figure 9. Vst - Io Heat sink surface, S - cm2 Output saturation voltage, Vst - V Output current, Io - A Figure 10. Diode forward voltage F1 to F6, Vdf - V Vdf - If Figure 11. IIL - VIL Diode forward current, If - A Input current 11 to 18 pins, IIL - A Input voltage, VIL - V No. 5708--15/16 STK673-010 Figure 12. Ir - VrH Figure 13. VOH - IOH Vref input voltage, VrH - V MOI output high voltage, VOH - V Vref input current, Ir - A 20 pins output current, IOH - mA Figure 14. VOL - IOL MOI output low voltage, VOL - V 20 pins output current, IOL - mA s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees, jointly or severally. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. s s This catalog provides information as of November, 1997. Specifications and information herein are subject to change without notice. No. 5708--16/16 |
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